Atmospheric-pressure dielectric barrier discharge generation by a full-bridge flying capacitor multilevel inverter

A new configuration of a resonant full-bridge flying capacitor multicell inverter has been designed and constructed with the aim of achieving an extended output voltage frequency range with low harmonic distortion and reduced semiconductor commutation losses. This configuration was tested as a power supply for two different coaxial dielectric barrier discharge reactors, one of them employed for electric characterization and the other one for inorganic compound elimination in an aqueous solution. Two different gas mixtures, 90% Ar–10% O_2 and80% Ar–20% O_2, were individually supplied during the experiments; the results showed a highefficiency removal of meta-cresol(m-cresol) to the order of 98%, which was obtained by adding more oxygen to the plasma gas mixture.     

Accounting for variability in the design of circuits with organic thin-film transistors

We experimentally verify that the methodology to account for local parameter variations and transistor mismatch known in Si CMOS technologies can be transposed to organic thin-film transistor technologies, and we present a design case that makes use of design for variability. Transistor parameter variation decreases with the square root of the transistor footprint. As a consequence, Monte Carlo simulations which take this effect into account can be executed to better predict the final circuit yield. The design case in this work is an 8-bit, organic RFID transponder chip. The yield prediction by simulations corresponds to the finally observed circuit yield.     

Nanoelectronic content-addressable memory

A novel nanoelectronic single-electron content addressable memory is designed and simulated. The proposed memory has three important building blocks: a storage block, a comparison block and an addressing block. These building blocks were built based on single-electron circuits such as Reset-Set latches, exclusive-or gates and a WTA neural network. Each one of the building blocks was separately adjusted to provide room temperature operation before being connected together. Some analyses concerning stability of each block and of the whole memory circuit were made. The nanoelectronic memory was successfully validated by simulation.     

同步整流双谐振LLC-DCX悬浮控制电源研究

针对传统悬浮控制电源设计中存在的占空比失调、稳压率差及转换效率低等问题,提出基于同步整流双谐振LLC-DCX的两级式变换方案。该方案在实现主次侧开关管ZVS和二次侧整流管低损耗的同时,降低了输入电流纹波;在介绍了双谐振LLC-DCX的工作原理的基础上,讨论了电源的关键参数设计。210W,220-380V输入、4路输出的原理样机实验结果及比较很好地验证了研究方案的先进性与可行性。     

基于改进CAF-WAS的绑定前硅通孔测试

硅通孔TSV发生开路故障和泄漏故障会降低三维集成电路的可靠性和良率,因此对绑定前的TSV测试尤为重要。现有CAF-WAS测试方法对泄漏故障的测试优于其他方法(环形振荡器等),缺点是该方法不能测试开路故障。伪泄漏路径思想的提出,解决了现有CAF-WAS方法不能对开路故障进行测试的问题。另外,重新设计了等待时间产生电路,降低了测试时间开销。HSPICE仿真结果显示,该方法能准确预测开路和泄漏故障的范围,测试时间开销仅为现有同类方法的25%。     

A mechanism for detecting on-chip radio frequency interference of field-programmable gate array

One-chip measurements without modifying the physical structure of packaged integrated circuits such as field-programmable gate arrays (FPGA) is challenging. This paper proposes a sensor for detecting the radio frequency interference (RFI) on the supply inside the FPGA chip. The core of the sensor is a ring oscillator built with FPGA look-up tables. The paper proposes a model to predict the response of the ring oscillator to power supply RFI, and shows that the normalized frequency shift of the ring oscillator resulting from the interference is determined by the amplitude of the interference. This relationship is independent of the interference frequency and the size of the ring oscillator. To verify the model, simulations on transistor-level look-up tables of 130-nm and 40-nm technologies were performed. The simulation results matched well with the model. In addition to simulation, an FPGA test board was fabricated. Measurements of FPGA RFI response were performed and the results were consistent with the theoretical model. The effect of the interference on the ring oscillator provided a mechanism to detect the amplitude of the supply interference on the FPGA chip. The frequency of the ring oscillator was monitored through the supply pin by measuring the spectrum of the supply noise. The properties of the sensor, such as constant response in a wide frequency range, insensitiveness to the oscillator size, ease of implementation, and minimal modification requirement of the physical structure, made it suitable for performing on-chip FPGA measurements.     

Practical reusable garbled circuits with parallel updates

The central contribution of the current paper is to establish a practical and effective reusable garbled circuit scheme with parallel updates, where each update is applied to the circuit in parallel. First of all, we present a strengthened notion of inner product functional encryption (IPE) called simulation-based security (SIM-security) for multi-instance and show that a secret-key IPE scheme is multi-instance SIM-secure. Then we put forward a reusable garbled circuit scheme based on the IPE scheme. The idea is a reduction from re-randomizable garbled circuits in which the distribution of the original garbled circuit is computationally indistinguishable from the re-randomized garbled circuit. Finally, we implemented reusable garbled circuits and validate the practicality of our reusable garbled circuit scheme. Experimental results demonstrate that our reusable garbled circuit scheme is suitable for a wide range of real-world scenarios.     

Simulations of four independent groups of hamiltonian circuited unknowns in the numerical solutions of elliptic partial differential equations

Past experiments on Hamiltonian circuited simulations of the partial differential equation of the Poisson type have indicated the influences of the Hamiltonian circuits on algebraic structures of coefficients matrices. The need to tend to the usage of finite difference schemes is also observed. A certain Hamiltonian circuit is found to enable the decomposition of the space of simulated points into two subspaces. This paper reports that the space can in fact be separated into four subspaces. Numerical simulations are carried out using a 7-point finite difference star. The results are compared with those obtained when the simulated points are divided into only two disjoint sets.